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FINN: A Framework for Fast, Scalable Binarized Neural Network Inference

FINN: A Framework for Fast, Scalable Binarized Neural Network Inference

1 December 2016
Yaman Umuroglu
Nicholas J. Fraser
Giulio Gambardella
Michaela Blott
Philip H. W. Leong
Magnus Jahre
K. Vissers
    MQ
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Papers citing "FINN: A Framework for Fast, Scalable Binarized Neural Network Inference"

50 / 222 papers shown
Title
Streaming Message Interface: High-Performance Distributed Memory
  Programming on Reconfigurable Hardware
Streaming Message Interface: High-Performance Distributed Memory Programming on Reconfigurable Hardware
T. De Matteis
Johannes de Fine Licht
Jakub Beránek
Torsten Hoefler
9
31
0
07 Sep 2019
A Novel Design of Adaptive and Hierarchical Convolutional Neural
  Networks using Partial Reconfiguration on FPGA
A Novel Design of Adaptive and Hierarchical Convolutional Neural Networks using Partial Reconfiguration on FPGA
Mohammad Farhadi
Mehdi Ghasemi
Yezhou Yang
16
27
0
05 Sep 2019
PULP-NN: Accelerating Quantized Neural Networks on Parallel
  Ultra-Low-Power RISC-V Processors
PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors
Angelo Garofalo
Manuele Rusci
Francesco Conti
D. Rossi
Luca Benini
MQ
11
134
0
29 Aug 2019
Effective Training of Convolutional Neural Networks with Low-bitwidth
  Weights and Activations
Effective Training of Convolutional Neural Networks with Low-bitwidth Weights and Activations
Bohan Zhuang
Jing Liu
Mingkui Tan
Lingqiao Liu
Ian Reid
Chunhua Shen
MQ
29
44
0
10 Aug 2019
A Stochastic-Computing based Deep Learning Framework using Adiabatic
  Quantum-Flux-Parametron SuperconductingTechnology
A Stochastic-Computing based Deep Learning Framework using Adiabatic Quantum-Flux-Parametron SuperconductingTechnology
R. Cai
Ao Ren
O. Chen
Ning Liu
Caiwen Ding
Xuehai Qian
Jie Han
Wenhui Luo
N. Yoshikawa
Yanzhi Wang
16
38
0
22 Jul 2019
Non-Structured DNN Weight Pruning -- Is It Beneficial in Any Platform?
Non-Structured DNN Weight Pruning -- Is It Beneficial in Any Platform?
Xiaolong Ma
Sheng Lin
Shaokai Ye
Zhezhi He
Linfeng Zhang
...
Deliang Fan
Xuehai Qian
X. Lin
Kaisheng Ma
Yanzhi Wang
MQ
27
92
0
03 Jul 2019
DeepShift: Towards Multiplication-Less Neural Networks
DeepShift: Towards Multiplication-Less Neural Networks
Mostafa Elhoushi
Zihao Chen
F. Shafiq
Ye Tian
Joey Yiwei Li
MQ
35
97
0
30 May 2019
Rethinking Arithmetic for Deep Neural Networks
Rethinking Arithmetic for Deep Neural Networks
George A. Constantinides
29
4
0
07 May 2019
LUTNet: Rethinking Inference in FPGA Soft Logic
LUTNet: Rethinking Inference in FPGA Soft Logic
Erwei Wang
James J. Davis
P. Cheung
George A. Constantinides
16
61
0
01 Apr 2019
Accelerating Generalized Linear Models with MLWeaving: A
  One-Size-Fits-All System for Any-precision Learning (Technical Report)
Accelerating Generalized Linear Models with MLWeaving: A One-Size-Fits-All System for Any-precision Learning (Technical Report)
Zeke Wang
Kaan Kara
Hantian Zhang
Gustavo Alonso
O. Mutlu
Ce Zhang
23
34
0
08 Mar 2019
Evolutionary Cell Aided Design for Neural Network Architectures
Evolutionary Cell Aided Design for Neural Network Architectures
Philip Colangelo
Oren Segal
Alexander Speicher
M. Margala
6
3
0
06 Mar 2019
FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer
  Learning
FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer Learning
P. Whatmough
Chuteng Zhou
Patrick Hansen
S. Venkataramanaiah
Jae-sun Seo
Matthew Mattina
15
57
0
27 Feb 2019
Deep Neural Network Approximation for Custom Hardware: Where We've Been,
  Where We're Going
Deep Neural Network Approximation for Custom Hardware: Where We've Been, Where We're Going
Erwei Wang
James J. Davis
Ruizhe Zhao
Ho-Cheung Ng
Xinyu Niu
Wayne Luk
P. Cheung
George A. Constantinides
24
59
0
21 Jan 2019
CodeX: Bit-Flexible Encoding for Streaming-based FPGA Acceleration of
  DNNs
CodeX: Bit-Flexible Encoding for Streaming-based FPGA Acceleration of DNNs
Mohammad Samragh
Mojan Javaheripi
F. Koushanfar
30
11
0
17 Jan 2019
FPGA-based Accelerators of Deep Learning Networks for Learning and
  Classification: A Review
FPGA-based Accelerators of Deep Learning Networks for Learning and Classification: A Review
Ahmad Shawahna
S. M. Sait
A. El-Maleh
28
372
0
01 Jan 2019
ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using
  Alternating Direction Method of Multipliers
ADMM-NN: An Algorithm-Hardware Co-Design Framework of DNNs Using Alternating Direction Method of Multipliers
Ao Ren
Tianyun Zhang
Shaokai Ye
Jiayu Li
Wenyao Xu
Xuehai Qian
X. Lin
Yanzhi Wang
MQ
34
161
0
31 Dec 2018
Efficient and Robust Machine Learning for Real-World Systems
Efficient and Robust Machine Learning for Real-World Systems
Franz Pernkopf
Wolfgang Roth
Matthias Zöhrer
Lukas Pfeifenberger
Günther Schindler
Holger Froening
Sebastian Tschiatschek
Robert Peharz
Matthew Mattina
Zoubin Ghahramani
OOD
27
1
0
05 Dec 2018
Efficient non-uniform quantizer for quantized neural network targeting
  reconfigurable hardware
Efficient non-uniform quantizer for quantized neural network targeting reconfigurable hardware
Natan Liss
Chaim Baskin
A. Mendelson
A. Bronstein
Raja Giryes
MQ
19
5
0
27 Nov 2018
Structured Binary Neural Networks for Accurate Image Classification and
  Semantic Segmentation
Structured Binary Neural Networks for Accurate Image Classification and Semantic Segmentation
Bohan Zhuang
Chunhua Shen
Mingkui Tan
Lingqiao Liu
Ian Reid
MQ
27
152
0
22 Nov 2018
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on
  Embedded FPGAs
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs
Yifan Yang
Qijing Huang
Bichen Wu
Tianjun Zhang
Liang Ma
...
Michaela Blott
Luciano Lavagno
K. Vissers
J. Wawrzynek
Kurt Keutzer
21
113
0
21 Nov 2018
Packing Sparse Convolutional Neural Networks for Efficient Systolic
  Array Implementations: Column Combining Under Joint Optimization
Packing Sparse Convolutional Neural Networks for Efficient Systolic Array Implementations: Column Combining Under Joint Optimization
H. T. Kung
Bradley McDanel
S. Zhang
27
133
0
07 Nov 2018
Neural Network-Hardware Co-design for Scalable RRAM-based BNN
  Accelerators
Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators
Yulhwa Kim
Hyungjun Kim
Jae-Joon Kim
MQ
14
11
0
06 Nov 2018
Automating Generation of Low Precision Deep Learning Operators
Automating Generation of Low Precision Deep Learning Operators
M. Cowan
T. Moreau
Tianqi Chen
Luis Ceze
MQ
39
13
0
25 Oct 2018
Combinatorial Attacks on Binarized Neural Networks
Combinatorial Attacks on Binarized Neural Networks
Elias Boutros Khalil
Amrita Gupta
B. Dilkina
AAML
49
40
0
08 Oct 2018
Towards Fast and Energy-Efficient Binarized Neural Network Inference on
  FPGA
Towards Fast and Energy-Efficient Binarized Neural Network Inference on FPGA
Cheng Fu
Shilin Zhu
Hao Su
Ching-En Lee
Jishen Zhao
MQ
22
31
0
04 Oct 2018
NICE: Noise Injection and Clamping Estimation for Neural Network
  Quantization
NICE: Noise Injection and Clamping Estimation for Neural Network Quantization
Chaim Baskin
Natan Liss
Yoav Chai
Evgenii Zheltonozhskii
Eli Schwartz
Raja Giryes
A. Mendelson
A. Bronstein
MQ
11
60
0
29 Sep 2018
Throughput Optimizations for FPGA-based Deep Neural Network Inference
Throughput Optimizations for FPGA-based Deep Neural Network Inference
Thorbjörn Posewsky
Daniel Ziener
11
25
0
28 Sep 2018
Scalar Arithmetic Multiple Data: Customizable Precision for Deep Neural
  Networks
Scalar Arithmetic Multiple Data: Customizable Precision for Deep Neural Networks
Andrew Anderson
David Gregg
MQ
16
1
0
27 Sep 2018
Towards Efficient Convolutional Neural Network for Domain-Specific
  Applications on FPGA
Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA
Ruizhe Zhao
Ho-Cheung Ng
Wayne Luk
Xinyu Niu
22
34
0
04 Sep 2018
Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural
  Network in Embedded FPGA
Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA
Junsong Wang
Qiuwen Lou
Xiaofan Zhang
Chao Zhu
Yonghua Lin
Deming Chen
MQ
33
93
0
31 Jul 2018
FPGA-Based CNN Inference Accelerator Synthesized from Multi-Threaded C
  Software
FPGA-Based CNN Inference Accelerator Synthesized from Multi-Threaded C Software
Jin Hee Kim
Brett Grady
Ruolong Lian
J. Brothers
J. Anderson
6
41
0
27 Jul 2018
NullaNet: Training Deep Neural Networks for Reduced-Memory-Access
  Inference
NullaNet: Training Deep Neural Networks for Reduced-Memory-Access Inference
M. Nazemi
Ghasem Pasandi
Massoud Pedram
20
20
0
23 Jul 2018
Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks
  on Reconfigurable Logic
Accuracy to Throughput Trade-offs for Reduced Precision Neural Networks on Reconfigurable Logic
Jiang Su
Nicholas J. Fraser
Giulio Gambardella
Michaela Blott
Gianluca Durelli
David B. Thomas
Philip H. W. Leong
P. Cheung
MQ
8
23
0
17 Jul 2018
FINN-L: Library Extensions and Design Trade-off Analysis for Variable
  Precision LSTM Networks on FPGAs
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs
Vladimir Rybalkin
Alessandro Pappalardo
M. M. Ghaffar
Giulio Gambardella
Norbert Wehn
Michaela Blott
11
72
0
11 Jul 2018
Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide
  DRAM Controller Interfaces
Medusa: A Scalable Interconnect for Many-Port DNN Accelerators and Wide DRAM Controller Interfaces
Yongming Shen
Tianchu Ji
M. Ferdman
Peter Milder
GNN
17
3
0
11 Jul 2018
XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary
  Neural Network Inference
XNOR Neural Engine: a Hardware Accelerator IP for 21.6 fJ/op Binary Neural Network Inference
Francesco Conti
Pasquale Davide Schiavone
Luca Benini
32
108
0
09 Jul 2018
SYQ: Learning Symmetric Quantization For Efficient Deep Neural Networks
SYQ: Learning Symmetric Quantization For Efficient Deep Neural Networks
Julian Faraone
Nicholas J. Fraser
Michaela Blott
Philip H. W. Leong
MQ
30
133
0
01 Jul 2018
Scaling Neural Network Performance through Customized Hardware
  Architectures on Reconfigurable Logic
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic
Michaela Blott
Thomas B. Preußer
Nicholas J. Fraser
Giulio Gambardella
Kenneth O'Brien
Yaman Umuroglu
M. Leeser
9
9
0
26 Jun 2018
Inference of Quantized Neural Networks on Heterogeneous All-Programmable
  Devices
Inference of Quantized Neural Networks on Heterogeneous All-Programmable Devices
Thomas B. Preußer
Giulio Gambardella
Nicholas J. Fraser
Michaela Blott
MQ
24
41
0
21 Jun 2018
Exploration of Low Numeric Precision Deep Learning Inference Using Intel
  FPGAs
Exploration of Low Numeric Precision Deep Learning Inference Using Intel FPGAs
Philip Colangelo
Nasibeh Nasiri
Asit K. Mishra
Eriko Nurvitadhi
M. Margala
Kevin Nealis
MQ
24
1
0
12 Jun 2018
Accelerating CNN inference on FPGAs: A Survey
Accelerating CNN inference on FPGAs: A Survey
K. Abdelouahab
Maxime Pelcat
Jocelyn Serot
F. Berry
AI4CE
27
147
0
26 May 2018
Heterogeneous Bitwidth Binarization in Convolutional Neural Networks
Heterogeneous Bitwidth Binarization in Convolutional Neural Networks
Josh Fromm
Shwetak N. Patel
Matthai Philipose
MQ
11
27
0
25 May 2018
CascadeCNN: Pushing the performance limits of quantisation
CascadeCNN: Pushing the performance limits of quantisation
Alexandros Kouris
Stylianos I. Venieris
C. Bouganis
MQ
30
24
0
22 May 2018
Transformations of High-Level Synthesis Codes for High-Performance
  Computing
Transformations of High-Level Synthesis Codes for High-Performance Computing
Johannes de Fine Licht
Maciej Besta
Simon Meierhans
Torsten Hoefler
8
90
0
21 May 2018
Value-aware Quantization for Training and Inference of Neural Networks
Value-aware Quantization for Training and Inference of Neural Networks
Eunhyeok Park
S. Yoo
Peter Vajda
MQ
14
158
0
20 Apr 2018
B-DCGAN:Evaluation of Binarized DCGAN for FPGA
B-DCGAN:Evaluation of Binarized DCGAN for FPGA
Hideo Terada
Hayaru Shouno
AI4CE
19
3
0
29 Mar 2018
Synergy: A HW/SW Framework for High Throughput CNNs on Embedded
  Heterogeneous SoC
Synergy: A HW/SW Framework for High Throughput CNNs on Embedded Heterogeneous SoC
G. Zhong
Akshat Dubey
Cheng Tan
T. Mitra
23
69
0
28 Mar 2018
Local Binary Pattern Networks
Local Binary Pattern Networks
Jeng-Hau Lin
Yunfan Yang
Rajesh K. Gupta
Z. Tu
MQ
18
13
0
19 Mar 2018
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey
  and Future Directions
Toolflows for Mapping Convolutional Neural Networks on FPGAs: A Survey and Future Directions
Stylianos I. Venieris
Alexandros Kouris
C. Bouganis
16
184
0
15 Mar 2018
On the Universal Approximation Property and Equivalence of Stochastic
  Computing-based Neural Networks and Binary Neural Networks
On the Universal Approximation Property and Equivalence of Stochastic Computing-based Neural Networks and Binary Neural Networks
Yanzhi Wang
Zheng Zhan
Jiayu Li
Jian Tang
Bo Yuan
Liang Zhao
Wujie Wen
Siyue Wang
X. Lin
14
8
0
14 Mar 2018
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