AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs
and ASICs

AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs

6 January 2020

Yue Wang

Papers citing "AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs"

17 / 17 papers shown

Title
Making AI Less "Thirsty": Uncovering and Addressing the Secret Water Footprint of AI Models Pengfei Li Jianyi Yang M. A. Islam Shaolei Ren 131 127 0 06 Apr 2023
2-in-1 Accelerator: Enabling Random Precision Switch for Winning Both Adversarial Robustness and Efficiency Yonggan Fu Yang Zhao Qixuan Yu Chaojian Li Yingyan Lin AAML 68 14 0 11 Sep 2021
Fractional Skipping: Towards Finer-Grained Dynamic CNN Inference Jianghao Shen Y. Fu Yue Wang Pengfei Xu Zhangyang Wang Yingyan Lin MQ 26 44 0 03 Jan 2020
E2-Train: Training State-of-the-art CNNs with Over 80% Energy Savings Yue Wang Ziyu Jiang Xiaohan Chen Pengfei Xu Yang Zhao Yingyan Lin Zhangyang Wang MQ 54 83 0 29 Oct 2019
SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems Xiaofan Zhang Haoming Lu Cong Hao Jiachen Li Bowen Cheng ... Jinjun Xiong Thomas Huang Humphrey Shi Wen-mei W. Hwu Deming Chen 57 92 0 20 Sep 2019
Dual Dynamic Inference: Enabling More Efficient, Adaptive and Controllable Deep Inference Yue Wang Jianghao Shen Ting-Kuei Hu Pengfei Xu T. Nguyen Richard Baraniuk Zhangyang Wang Yingyan Lin 39 76 0 10 Jul 2019
FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge Cong Hao Xiaofan Zhang Yuhong Li Sitao Huang Jinjun Xiong K. Rupnow Wen-mei W. Hwu Deming Chen 67 173 0 09 Apr 2019
Design Flow of Accelerating Hybrid Extremely Low Bit-width Neural Network in Embedded FPGA Junsong Wang Qiuwen Lou Xiaofan Zhang Chao Zhu Yonghua Lin Deming Chen MQ 45 93 0 31 Jul 2018
Deep $k$ -Means: Re-Training and Parameter Sharing with Harder Cluster Assignments for Compressing Deep Convolutions Junru Wu Yue Wang Zhenyu Wu Zhangyang Wang Ashok Veeraraghavan Yingyan Lin 34 115 0 24 Jun 2018
Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach Using MAESTRO Hyoukjun Kwon Prasanth Chatarasi Michael Pellauer A. Parashar Vivek Sarkar T. Krishna 29 10 0 04 May 2018
Face Recognition with Hybrid Efficient Convolution Algorithms on FPGAs Chuanhao Zhuge Xinheng Liu Xiaofan Zhang S. Gummadi Jinjun Xiong Deming Chen CVBM 32 36 0 23 Mar 2018
MobileNetV2: Inverted Residuals and Linear Bottlenecks Mark Sandler Andrew G. Howard Menglong Zhu A. Zhmoginov Liang-Chieh Chen 143 19,124 0 13 Jan 2018
In-Datacenter Performance Analysis of a Tensor Processing Unit N. Jouppi C. Young Nishant Patil David Patterson Gaurav Agrawal ... Vijay Vasudevan Richard Walter Walter Wang Eric Wilcox Doe Hyun Yoon 178 4,619 0 16 Apr 2017
The Microsoft 2016 Conversational Speech Recognition System Wayne Xiong J. Droppo Xuedong Huang Frank Seide M. Seltzer A. Stolcke Dong Yu Geoffrey Zweig 41 289 0 12 Sep 2016
Deep Residual Learning for Image Recognition Kaiming He Xinming Zhang Shaoqing Ren Jian Sun MedIm 1.4K 192,638 0 10 Dec 2015
Faster R-CNN: Towards Real-Time Object Detection with Region Proposal Networks Shaoqing Ren Kaiming He Ross B. Girshick Jian Sun AIMat ObjD 410 61,900 0 04 Jun 2015
Very Deep Convolutional Networks for Large-Scale Image Recognition Karen Simonyan Andrew Zisserman FAtt MDE 928 99,991 0 04 Sep 2014