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1807.06434
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DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration
13 July 2018
Mohamed S. Abdelfattah
David Han
Andrew Bitar
R. Dicecco
Shane O'Connell
Nitika Shanker
Joseph Chu
Ian Prins
Joshua Fender
A. Ling
Gordon R. Chiu
BDL
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Papers citing
"DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration"
16 / 16 papers shown
Title
GCV-Turbo: End-to-end Acceleration of GNN-based Computer Vision Tasks on FPGA
Bingyi Zhang
Rajgopal Kannan
Carl E. Busart
Viktor Prasanna
GNN
ViT
32
0
0
10 Apr 2024
Beyond Inference: Performance Analysis of DNN Server Overheads for Computer Vision
Ahmed F. AbouElhamayed
Susanne Balle
Deshanand Singh
Mohamed S. Abdelfattah
3DH
32
0
0
02 Mar 2024
FLIQS: One-Shot Mixed-Precision Floating-Point and Integer Quantization Search
Jordan Dotzel
Gang Wu
Andrew Li
M. Umar
Yun Ni
...
Liqun Cheng
Martin G. Dixon
N. Jouppi
Quoc V. Le
Sheng Li
MQ
43
3
0
07 Aug 2023
PQA: Exploring the Potential of Product Quantization in DNN Hardware Acceleration
Ahmed F. AbouElhamayed
Angela Cui
Javier Fernandez-Marques
Nicholas D. Lane
Mohamed S. Abdelfattah
MQ
34
4
0
25 May 2023
GraphAGILE: An FPGA-based Overlay Accelerator for Low-latency GNN Inference
Bingyi Zhang
Hanqing Zeng
Viktor Prasanna
GNN
29
16
0
02 Feb 2023
FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure
Y. F. Arthanto
David Ojika
Joo-Young Kim
FedML
63
2
0
11 Jul 2022
Vis-TOP: Visual Transformer Overlay Processor
Wei Hu
Dian Xu
Zimeng Fan
Fang Liu
Yanxiang He
BDL
ViT
25
5
0
21 Oct 2021
AI Accelerator Survey and Trends
Albert Reuther
Peter Michaleas
Michael Jones
V. Gadepally
S. Samsi
J. Kepner
50
79
0
18 Sep 2021
ShortcutFusion: From Tensorflow to FPGA-based accelerator with reuse-aware memory allocation for shortcut data
Duy-Thanh Nguyen
Hyeonseung Je
Tuan Nghia Nguyen
Soojung Ryu
Kyujoong Lee
Hyuk-Jae Lee
21
24
0
15 Jun 2021
unzipFPGA: Enhancing FPGA-based CNN Engines with On-the-Fly Weights Generation
Stylianos I. Venieris
Javier Fernandez-Marques
Nicholas D. Lane
26
11
0
09 Mar 2021
Ordering Chaos: Memory-Aware Scheduling of Irregularly Wired Neural Networks for Edge Devices
Byung Hoon Ahn
Jinwon Lee
J. Lin
Hsin-Pai Cheng
Jilei Hou
H. Esmaeilzadeh
76
55
0
04 Mar 2020
Best of Both Worlds: AutoML Codesign of a CNN and its Hardware Accelerator
Mohamed S. Abdelfattah
Łukasz Dudziak
Thomas C. P. Chau
Royson Lee
Hyeji Kim
Nicholas D. Lane
17
80
0
11 Feb 2020
VarGNet: Variable Group Convolutional Neural Network for Efficient Embedded Computing
Qian Zhang
Jianjun Li
Meng Yao
Liangchen Song
Helong Zhou
Zhichao Li
Wenming Meng
Xuezhi Zhang
Guoli Wang
26
22
0
12 Jul 2019
DNNVM : End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-based CNN Accelerators
Yu Xing
Shuang Liang
Lingzhi Sui
Xijie Jia
Jiantao Qiu
Xin Liu
Yushun Wang
Yu Wang
Yi Shan
46
68
0
20 Feb 2019
FPGA-based Accelerators of Deep Learning Networks for Learning and Classification: A Review
Ahmad Shawahna
S. M. Sait
A. El-Maleh
28
372
0
01 Jan 2019
Google's Neural Machine Translation System: Bridging the Gap between Human and Machine Translation
Yonghui Wu
M. Schuster
Zhehuai Chen
Quoc V. Le
Mohammad Norouzi
...
Alex Rudnick
Oriol Vinyals
G. Corrado
Macduff Hughes
J. Dean
AIMat
718
6,750
0
26 Sep 2016
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