Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning

21 July 2024

Papers citing "Large Language Model for Verilog Generation with Code-Structure-Guided Reinforcement Learning"

3 / 3 papers shown

Title
ResBench: Benchmarking LLM-Generated FPGA Designs with Resource Awareness Ce Guo Tong Zhao 61 1 0 11 Mar 2025
Training language models to follow instructions with human feedback Long Ouyang Jeff Wu Xu Jiang Diogo Almeida Carroll L. Wainwright ... Amanda Askell Peter Welinder Paul Christiano Jan Leike Ryan J. Lowe OSLM ALM 375 12,081 0 04 Mar 2022
Fine-Tuning Language Models from Human Preferences Daniel M. Ziegler Nisan Stiennon Jeff Wu Tom B. Brown Alec Radford Dario Amodei Paul Christiano G. Irving ALM 301 1,616 0 18 Sep 2019