Scalable and Effective Arithmetic Tree Generation for Adder and
Multiplier Designs

Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs

10 May 2024

Ping Luo

Papers citing "Scalable and Effective Arithmetic Tree Generation for Adder and Multiplier Designs"

8 / 8 papers shown

Title
DOMAC: Differentiable Optimization for High-Speed Multipliers and Multiply-Accumulators Chenhao Xue Yi Ren Jinwei Zhou Kezhi Li Chen Zhang Yibo Lin L. Zhang Qiang Xu Guangyu Sun 26 0 0 31 Mar 2025
INSIGHT: Universal Neural Simulator for Analog Circuits Harnessing Autoregressive Transformers Souradip Poddar Youngmin Oh Yao Lai Hanqing Zhu Bosun Hwang David Z. Pan 27 2 0 10 Jul 2024
LLM-Enhanced Bayesian Optimization for Efficient Analog Layout Constraint Generation Guojin Chen Keren Zhu Seunggeun Kim Hanqing Zhu Yao Lai Bei Yu David Z. Pan 26 7 0 07 Jun 2024
AnalogCoder: Analog Circuit Design via Training-Free Code Generation Yao Lai Sungyoung Lee Guojin Chen Souradip Poddar Mengkang Hu David Z. Pan Ping Luo 46 29 0 23 May 2024
PreRoutGNN for Timing Prediction with Order Preserving Partition: Global Circuit Pre-training, Local Delay Learning and Attentional Cell Modeling Ruizhe Zhong Junjie Ye Zhentao Tang Shixiong Kai Mingxuan Yuan Jianye Hao Junchi Yan 42 8 0 27 Feb 2024
PrefixRL: Optimization of Parallel Prefix Circuits using Deep Reinforcement Learning Rajarshi Roy Jonathan Raiman Neel Kant Ilyas Elkin Robert M. Kirby Michael Siu S. Oberman Saad Godil Bryan Catanzaro 35 38 0 14 May 2022
Training language models to follow instructions with human feedback Long Ouyang Jeff Wu Xu Jiang Diogo Almeida Carroll L. Wainwright ... Amanda Askell Peter Welinder Paul Christiano Jan Leike Ryan J. Lowe OSLM ALM 313 11,953 0 04 Mar 2022
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Abdelrahman I. Hosny S. Hashemi M. Shalan Sherief Reda 61 109 0 11 Nov 2019