MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications

3 March 2024

Papers citing "MATADOR: Automated System-on-Chip Tsetlin Machine Design Generation for Edge Applications"

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Title
Dynamic Tsetlin Machine Accelerators for On-Chip Training at the Edge using FPGAs Gang Mao Tousif Rahman Sidharth Maheshwari Bob Pattison Zhuang Shao R. Shafik Alex Yakovlev 29 0 0 28 Apr 2025