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Make Every Move Count: LLM-based High-Quality RTL Code Generation Using
  MCTS

Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS

5 February 2024
Matthew DeLorenzo
A. B. Chowdhury
Vasudev Gohil
Shailja Thakur
Ramesh Karri
Siddharth Garg
Jeyavijayan Rajendran
ArXivPDFHTML

Papers citing "Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS"

9 / 9 papers shown
Title
Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors
Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors
Nicolas Dupuis
Ravi Nair
Shyam Ramji
Sean McClintock
Nishant Chauhan
Priyanka Nagpal
Bart Blaner
Ken Valk
Leon Stok
Ruchir Puri
24
0
0
14 May 2025
LSR-MCTS: Alleviating Long Range Dependency in Code Generation
LSR-MCTS: Alleviating Long Range Dependency in Code Generation
Tingwei Lu
Yangning Li
Liyuan Wang
Binghuai Lin
Jiwei Tang
...
Wanshi Xu
Hai-Tao Zheng
Yinghui Li
Xin Su
Zifei Shan
LLMAG
67
0
0
10 Apr 2025
RocketPPA: Ultra-Fast LLM-Based PPA Estimator at Code-Level Abstraction
RocketPPA: Ultra-Fast LLM-Based PPA Estimator at Code-Level Abstraction
Armin Abdollahi
M. Kamal
Massoud Pedram
MoE
169
1
0
27 Mar 2025
A Survey of Research in Large Language Models for Electronic Design Automation
A Survey of Research in Large Language Models for Electronic Design Automation
Jingyu Pan
Guanglei Zhou
Chen-Chia Chang
Isaac Jacobson
Jiang Hu
Yuxiao Chen
71
2
0
17 Jan 2025
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair
CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair
Mingjie Liu
Yun-Da Tsai
Wenfei Zhou
Haoxing Ren
SyDa
3DV
45
6
0
19 Sep 2024
VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code
  Generation
VHDL-Eval: A Framework for Evaluating Large Language Models in VHDL Code Generation
Prashanth Vijayaraghavan
Luyao Shi
S. Ambrogio
C. Mackin
Apoorva Nitsure
David Beymer
Ehsan Degan
24
6
0
06 Jun 2024
LLMs and the Future of Chip Design: Unveiling Security Risks and
  Building Trust
LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust
Zeng Wang
Lilas Alrahis
Likhitha Mankali
J. Knechtel
Ozgur Sinanoglu
46
9
0
11 May 2024
Chip-Chat: Challenges and Opportunities in Conversational Hardware
  Design
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design
Jason Blocklove
S. Garg
Ramesh Karri
Hammond Pearce
45
169
0
22 May 2023
CodeT5: Identifier-aware Unified Pre-trained Encoder-Decoder Models for
  Code Understanding and Generation
CodeT5: Identifier-aware Unified Pre-trained Encoder-Decoder Models for Code Understanding and Generation
Yue Wang
Weishi Wang
Chenyu You
Guosheng Lin
246
1,492
0
02 Sep 2021
1