Advanced Large Language Model (LLM)-Driven Verilog Development:
Enhancing Power, Performance, and Area Optimization in Code Synthesis

Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis

2 December 2023

Hongwu Peng

Xi Xie

Caiwen Ding

Papers citing "Advanced Large Language Model (LLM)-Driven Verilog Development: Enhancing Power, Performance, and Area Optimization in Code Synthesis"

8 / 8 papers shown

Title
TuRTLe: A Unified Evaluation of LLMs for RTL Generation Dario Garcia-Gasulla Gokcen Kestor Emanuele Parisi Miquel Albertí-Binimelis Cristian Gutierrez Razine Moundir Ghorab Orlando Montenegro Bernat Homs Miquel Moreto 53 0 0 31 Mar 2025
RocketPPA: Ultra-Fast LLM-Based PPA Estimator at Code-Level Abstraction Armin Abdollahi M. Kamal Massoud Pedram MoE 187 1 0 27 Mar 2025
FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware Minwoo Kang Mingjie Liu Ghaith Bany Hamad Syed Suhaib Haoxing Ren LRM 31 2 0 15 Oct 2024
EDA Corpus: A Large Language Model Dataset for Enhanced Interaction with OpenROAD Bing-Yue Wu Utsav Sharma Sai Rahul Dhanvi Kankipati Ajay Yadav Bintu Kappil George Sai Ritish Guntupalli Austin Rovinski V. A. Chhabria 39 9 0 04 May 2024
Key Information Retrieval to Classify the Unstructured Data Content of Preferential Trade Agreements Jiahui Zhao Ziyi Meng Stepan Gordeev Zijie Pan Dongjin Song Sandro Steinbach Caiwen Ding 33 1 0 23 Jan 2024
MaxK-GNN: Extremely Fast GPU Kernel Design for Accelerating Graph Neural Networks Training Hongwu Peng Xi Xie Kaustubh Shivdikar Md Amit Hasan Jiahui Zhao Shaoyi Huang Omer Khan David Kaeli Caiwen Ding 38 37 0 14 Dec 2023
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design Jason Blocklove S. Garg Ramesh Karri Hammond Pearce 45 169 0 22 May 2023
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Abdelrahman I. Hosny S. Hashemi M. Shalan Sherief Reda 61 109 0 11 Nov 2019