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Performance Evaluation of Evolutionary Algorithms for Analog Integrated Circuit Design Optimisation

Performance Evaluation of Evolutionary Algorithms for Analog Integrated Circuit Design Optimisation

Ria Rashid
Gopavaram Raghunath
Vasant Badugu
N. Nambath
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Papers citing "Performance Evaluation of Evolutionary Algorithms for Analog Integrated Circuit Design Optimisation"

2 / 2 papers shown
Title
Automated Circuit Sizing with Multi-objective Optimization based on Differential Evolution and Bayesian Inference
Automated Circuit Sizing with Multi-objective Optimization based on Differential Evolution and Bayesian Inference
C. Vișan
Octavian Pascu
Marius Stanescu
Elena-Diana Şandru
C. Diaconu
Andi Buzo
G. Pelz
H. Cucu
29
26
0
06 Jun 2022
An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble
An Efficient Batch Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multi-objective Acquisition Ensemble
Shuhan Zhang
Fan Yang
Changhao Yan
Dian Zhou
Xuan Zeng
64
67
0
28 Jun 2021

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