Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA

3 October 2023

Papers citing "Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA"

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Title
A shared compilation stack for distributed-memory parallelism in stencil DSLs George Bisbas Anton Lydike Emilien Bauer Nick M. Brown Mathieu Fehr ... Gabriel Rodriguez-Canal Maurice Jamieson Paul H. J. Kelly Michel Steuwer Tobias Grosser 40 4 0 02 Apr 2024