ResearchTrend.AI
  • Papers
  • Communities
  • Events
  • Blog
  • Pricing
Papers
Communities
Social Events
Terms and Conditions
Pricing
Parameter LabParameter LabTwitterGitHubLinkedInBlueskyYoutube

© 2025 ResearchTrend.AI, All rights reserved.

  1. Home
  2. Papers
  3. 2305.06979
  4. Cited By
Specification and Verification of Side-channel Security for Open-source
  Processors via Leakage Contracts

Specification and Verification of Side-channel Security for Open-source Processors via Leakage Contracts

11 May 2023
Zilong Wang
Gideon Mohr
Klaus von Gleissenthall
Jan Reineke
Marco Guarnieri
ArXivPDFHTML

Papers citing "Specification and Verification of Side-channel Security for Open-source Processors via Leakage Contracts"

8 / 8 papers shown
Title
DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking assisted Processor Fuzzing
DejaVuzz: Disclosing Transient Execution Bugs with Dynamic Swappable Memory and Differential Information Flow Tracking assisted Processor Fuzzing
Jinyan Xu
Yangye Zhou
Xingzhi Zhang
You Li
Qinhan Tan
Yinqian Zhang
Yajin Zhou
Rui Chang
Wenbo Shen
27
0
0
29 Apr 2025
AMuLeT: Automated Design-Time Testing of Secure Speculation Countermeasures
Bo Fu
Leo Tenenbaum
David Adler
Assaf Klein
Arpit Gogia
Alaa R. Alameldeen
Marco Guarnieri
M. Silberstein
O. Oleksenko
Gururaj Saileshwar
29
0
0
28 Feb 2025
SemPat: Using Hyperproperty-based Semantic Analysis to Generate
  Microarchitectural Attack Patterns
SemPat: Using Hyperproperty-based Semantic Analysis to Generate Microarchitectural Attack Patterns
Adwait Godbole
Yatin A. Manerkar
S. Seshia
40
1
0
08 Jun 2024
WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing
  Vulnerabilities in Processors
WhisperFuzz: White-Box Fuzzing for Detecting and Locating Timing Vulnerabilities in Processors
P. Borkar
Chen Chen
Mohamadreza Rostami
Nikhilesh Singh
Rahul Kande
A. Sadeghi
Chester Rebeiro
Jeyavijayan Rajendran
39
9
0
06 Feb 2024
Testing side-channel security of cryptographic implementations against
  future microarchitectures
Testing side-channel security of cryptographic implementations against future microarchitectures
Gilles Barthe
Marcel Böhme
Sunjay Cauligi
C. Chuengsatiansup
Daniel Genkin
Marco Guarnieri
David Mateos Romero
Peter Schwabe
David Wu
Y. Yarom
ELM
32
6
0
01 Feb 2024
Synthesizing Hardware-Software Leakage Contracts for RISC-V Open-Source
  Processors
Synthesizing Hardware-Software Leakage Contracts for RISC-V Open-Source Processors
Gideon Mohr
Marco Guarnieri
Jan Reineke
28
3
0
17 Jan 2024
A Scalable Formal Verification Methodology for Data-Oblivious Hardware
A Scalable Formal Verification Methodology for Data-Oblivious Hardware
Lucas Deutschmann
Johannes Mueller
M. R. Fadiheh
D. Stoffel
W. Kunz
16
5
0
15 Aug 2023
TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models
  for Finding Software-Exploitable Vulnerabilities
TheHuzz: Instruction Fuzzing of Processors Using Golden-Reference Models for Finding Software-Exploitable Vulnerabilities
Aakash Tyagi
Addison Crump
A. Sadeghi
Garrett Persyn
Jeyavijayan Rajendran
Patrick Jauernig
Rahul Kande
43
61
0
24 Jan 2022
1