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Dynamically Reconfigurable Variable-precision Sparse-Dense Matrix
  Acceleration in Tensorflow Lite

Dynamically Reconfigurable Variable-precision Sparse-Dense Matrix Acceleration in Tensorflow Lite

17 April 2023
J. Núñez-Yáñez
A. Otero
E. D. L. Torre
ArXivPDFHTML

Papers citing "Dynamically Reconfigurable Variable-precision Sparse-Dense Matrix Acceleration in Tensorflow Lite"

3 / 3 papers shown
Title
BRDS: An FPGA-based LSTM Accelerator with Row-Balanced Dual-Ratio
  Sparsification
BRDS: An FPGA-based LSTM Accelerator with Row-Balanced Dual-Ratio Sparsification
Seyed Abolfazl Ghasemzadeh
E. Tavakoli
M. Kamal
A. Afzali-Kusha
Massoud Pedram
19
13
0
07 Jan 2021
TensorFlow Lite Micro: Embedded Machine Learning on TinyML Systems
TensorFlow Lite Micro: Embedded Machine Learning on TinyML Systems
R. David
Jared Duke
Advait Jain
Vijay Janapa Reddi
Nat Jeffries
...
Meghna Natraj
Shlomi Regev
Rocky Rhodes
Tiezhen Wang
Pete Warden
119
466
0
17 Oct 2020
Fast inference of deep neural networks in FPGAs for particle physics
Fast inference of deep neural networks in FPGAs for particle physics
Javier Mauricio Duarte
Song Han
Philip C. Harris
S. Jindariani
E. Kreinar
...
J. Ngadiuba
M. Pierini
R. Rivera
N. Tran
Zhenbin Wu
AI4CE
77
387
0
16 Apr 2018
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