Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulations

10 November 2021

Papers citing "Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulations"

6 / 6 papers shown

Title
Evaluating Versal AI Engines for option price discovery in market risk analysis Mark Klaisoongnoen Nick M. Brown Tim Dykes Jessica R. Jones U. Haus 105 2 0 19 Feb 2024
Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA Gabriel Rodriguez-Canal Nick M. Brown Maurice Jamieson Emilien Bauer Anton Lydike Tobias Grosser 30 3 0 03 Oct 2023
Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs Gabriel Rodriguez-Canal Nick M. Brown Timothy Dykes Jessica R. Jones U. Haus 67 5 0 25 Aug 2023
Morpheus unleashed: Fast cross-platform SpMV on emerging architectures Christodoulos Stylianou Mark Klaisoongnoen Ricardo Jesus Nick M. Brown Michèle Weiland 103 0 0 19 Apr 2023
Task-based preemptive scheduling on FPGAs leveraging partial reconfiguration Gabriel Rodriguez-Canal Nick M. Brown Yuri Torres Arturo González-Escribano 35 2 0 18 Jan 2023
Low-power option Greeks: Efficiency-driven market risk analysis using FPGAs Mark Klaisoongnoen Nick M. Brown O. Brown 55 10 0 08 Jun 2022