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2110.00211
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DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks
1 October 2021
A. Budak
Prateek Bhansali
Bo Liu
Nan Sun
David Z. Pan
Chandramouli V. Kashyap
AI4CE
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Papers citing
"DNN-Opt: An RL Inspired Optimization for Analog Circuit Sizing using Deep Neural Networks"
3 / 3 papers shown
Title
DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining
Sungyoung Lee
Zhilin Wang
Seunggeun Kim
Taekyun Lee
Yao Lai
David Z. Pan
SSL
GNN
78
0
0
13 Feb 2025
GraCo -- A Graph Composer for Integrated Circuits
Stefan Uhlich
Andrea Bonetti
Arun Venkitaraman
Ali Momeni
Ryoga Matsuo
Chia-Yu Hsieh
Eisaku Ohbuchi
Lorenzo Servadei
GNN
93
0
0
21 Nov 2024
Practical Layout-Aware Analog/Mixed-Signal Design Automation with Bayesian Neural Networks
A. Budak
Keren Zhu
Yao Lai
19
3
0
27 Nov 2023
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