A High Throughput Parallel Hash Table on FPGA using XOR-based Memory

7 August 2021

Papers citing "A High Throughput Parallel Hash Table on FPGA using XOR-based Memory"

2 / 2 papers shown

Title
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA Sasindu Wijeratne Akhilesh R. Jaiswal Ajey P. Jacob Bingyi Zhang Viktor Prasanna 17 2 0 22 Aug 2022
Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA Sasindu Wijeratne R. Kannan Viktor Prasanna 28 6 0 18 Sep 2021