Latch-Based Logic Locking

21 May 2020

Papers citing "Latch-Based Logic Locking"

8 / 8 papers shown

Title
An Overview of FPGA-inspired Obfuscation Techniques Zain Ul Abideen S. Gokulanathan Muayad J. Aljafar S. Pagliarini AAML 42 3 0 25 May 2023
Unraveling Latch Locking Using Machine Learning, Boolean Analysis, and ILP Dake Chen Xuan Zhou Yinghua Hu Yuke Zhang Kaixin Yang A. Rittenbach Pierluigi Nuzzo Peter A. Beerel 53 2 0 28 Apr 2023
A Security-aware and LUT-based CAD Flow for the Physical Synthesis of eASICs Zain Ul Abideen T. Perez Mayler G. A. Martins S. Pagliarini 28 8 0 12 Jul 2022
Complexity Analysis of the SAT Attack on Logic Locking Yadi Zhong Ujjwal Guin 61 18 0 05 Jul 2022
AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking Yadi Zhong Ayush Jain M. T. Rahman Navid Asadizanjani Jiafeng Xie Ujjwal Guin 88 8 0 09 Jun 2022
Obfuscating the Hierarchy of a Digital IP Giorgi Basiashvili Zain Ul Abideen S. Pagliarini 62 3 0 19 May 2022
From FPGAs to Obfuscated eASICs: Design and Security Trade-offs Zain Ul Abideen T. Perez S. Pagliarini 17 10 0 11 Oct 2021
High-level Intellectual Property Obfuscation via Decoy Constants Levent Aksoy Quang-Linh Nguyen Felipe Almeida J. Raik M. Flottes Sophie Dupuis S. Pagliarini 19 4 0 13 May 2021