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DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training

DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training

Xiaochen Peng
Shanshi Huang
Hongwu Jiang
A. Lu
Shimeng Yu
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Papers citing "DNN+NeuroSim V2.0: An End-to-End Benchmarking Framework for Compute-in-Memory Accelerators for On-chip Training"

5 / 5 papers shown
Title
NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities
NeuroSim V1.5: Improved Software Backbone for Benchmarking Compute-in-Memory Accelerators with Device and Circuit-level Non-idealities
James Read
Ming-Yen Lee
Wei-Hsing Huang
Yuan-Chun Luo
A. Lu
Shimeng Yu
44
0
0
05 May 2025
MEMHD: Memory-Efficient Multi-Centroid Hyperdimensional Computing for Fully-Utilized In-Memory Computing Architectures
MEMHD: Memory-Efficient Multi-Centroid Hyperdimensional Computing for Fully-Utilized In-Memory Computing Architectures
Do Yeong Kang
Yeong Hwan Oh
Chanwook Hwang
Jinhee Kim
Kang Eun Jeon
Jong Hwan Ko
93
0
0
11 Feb 2025
Low-Rank Compression for IMC Arrays
Low-Rank Compression for IMC Arrays
Kang Eun Jeon
Johnny Rhe
J. Ko
45
0
0
10 Feb 2025
Towards Efficient IMC Accelerator Design Through Joint Hardware-Workload Co-optimization
Towards Efficient IMC Accelerator Design Through Joint Hardware-Workload Co-optimization
Olga Krestinskaya
M. Fouda
A. Eltawil
K. Salama
34
0
0
22 Oct 2024
TxSim:Modeling Training of Deep Neural Networks on Resistive Crossbar Systems
TxSim:Modeling Training of Deep Neural Networks on Resistive Crossbar Systems
Sourjya Roy
S. Sridharan
Shubham Jain
A. Raghunathan
29
44
0
25 Feb 2020