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LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and
  ASIC-Hardware Protection
v1v2 (latest)

LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection

30 April 2018
Hadi Kamali
Kimia Azar
K. Gaj
Houman Homayoun
Avesta Sasan
ArXiv (abs)PDFHTML

Papers citing "LUT-Lock: A Novel LUT-based Logic Obfuscation for FPGA-Bitstream and ASIC-Hardware Protection"

3 / 3 papers shown
Title
Complexity Analysis of the SAT Attack on Logic Locking
Complexity Analysis of the SAT Attack on Logic Locking
Yadi Zhong
Ujjwal Guin
61
17
0
05 Jul 2022
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware
SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware
Shervin Roshanisefat
Hadi Kamali
Avesta Sasan
48
73
0
24 Apr 2018
Digital IP Protection Using Threshold Voltage Control
Digital IP Protection Using Threshold Voltage Control
Joseph Davis
Niranjan S. Kulkarni
Jinghua Yang
A. Dengi
S. Vrudhula
41
7
0
23 Mar 2016
1