Developing Synthesis Flows Without Human Knowledge

16 April 2018

Papers citing "Developing Synthesis Flows Without Human Knowledge"

11 / 11 papers shown

Title
A Benchmark on Directed Graph Representation Learning in Hardware Designs Haoyu Wang Yinan Huang Nan Wu Pan Li OOD 50 1 0 09 Oct 2024
Verilog-to-PyG -- A Framework for Graph Learning and Augmentation on RTL Designs Yingjie Li Mingju Liu Alan Mishchenko Cunxi Yu 37 6 0 09 Nov 2023
INVICTUS: Optimizing Boolean Logic Circuit Synthesis via Synergistic Learning and Search A. B. Chowdhury Marco Romanelli Benjamin Tan Ramesh Karri S. Garg 18 2 0 22 May 2023
The prediction of the quality of results in Logic Synthesis using Transformer and Graph Neural Networks Chenghao Yang Zhongda Wang Yinshui Xia Zhufei Chu 18 0 0 23 Jul 2022
Too Big to Fail? Active Few-Shot Learning Guided Logic Synthesis A. B. Chowdhury Benjamin Tan Ryan Carey Tushit Jain Ramesh Karri S. Garg 36 3 0 05 Apr 2022
The Dark Side: Security Concerns in Machine Learning for EDA Zhiyao Xie Jingyu Pan Chen-Chia Chang Yiran Chen 16 4 0 20 Mar 2022
LOSTIN: Logic Optimization via Spatio-Temporal Information with Hybrid Graph Models Nan Wu Jiwon Lee Yuan Xie Cong Hao 38 18 0 20 Jan 2022
BOiLS: Bayesian Optimisation for Logic Synthesis Antoine Grosnit C. Malherbe Rasul Tutunov Xingchen Wan Jun Wang H. Ammar 19 30 0 11 Nov 2021
A Survey of Machine Learning for Computer Architecture and Systems Nan Wu Yuan Xie AI4TS AI4CE 20 145 0 16 Feb 2021
DRiLLS: Deep Reinforcement Learning for Logic Synthesis Abdelrahman I. Hosny S. Hashemi M. Shalan Sherief Reda 61 109 0 11 Nov 2019
Are Adversarial Perturbations a Showstopper for ML-Based CAD? A Case Study on CNN-Based Lithographic Hotspot Detection Kang Liu Haoyu Yang Yuzhe Ma Benjamin Tan Bei Yu Evangeline F. Y. Young Ramesh Karri S. Garg AAML 20 10 0 25 Jun 2019