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Hardware Architecture for Large Parallel Array of Random Feature
  Extractors applied to Image Recognition

Hardware Architecture for Large Parallel Array of Random Feature Extractors applied to Image Recognition

24 December 2015
Aakash Patil
Shanlan Shen
Enyi Yao
A. Basu
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Papers citing "Hardware Architecture for Large Parallel Array of Random Feature Extractors applied to Image Recognition"

2 / 2 papers shown
Title
Prospects for Analog Circuits in Deep Networks
Prospects for Analog Circuits in Deep Networks
Shih-Chii Liu
J. Strachan
A. Basu
16
6
0
23 Jun 2021
A Stacked Autoencoder Neural Network based Automated Feature Extraction
  Method for Anomaly detection in On-line Condition Monitoring
A Stacked Autoencoder Neural Network based Automated Feature Extraction Method for Anomaly detection in On-line Condition Monitoring
Mohendra Roy
S. Bose
B. Kar
P. K. Gopalakrishnan
A. Basu
24
30
0
19 Oct 2018
1