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Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks
11 November 2015
Johannes Hofmann
D. Fey
Jan Eitzinger
G. Hager
G. Wellein
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Papers citing
"Analysis of Intel's Haswell Microarchitecture Using The ECM Model and Microbenchmarks"
3 / 3 papers shown
Title
Execution-Cache-Memory Performance Model: Introduction and Validation
Johannes Hofmann
Jan Eitzinger
D. Fey
29
19
0
10 Sep 2015
Quantifying performance bottlenecks of stencil computations using the Execution-Cache-Memory model
H. Stengel
Jan Treibig
G. Hager
G. Wellein
43
116
0
18 Oct 2014
Exploring performance and power properties of modern multicore chips via simple machine models
G. Hager
Jan Treibig
J. Habich
G. Wellein
61
114
0
14 Aug 2012
1