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A neuromorphic hardware architecture using the Neural Engineering
  Framework for pattern recognition

A neuromorphic hardware architecture using the Neural Engineering Framework for pattern recognition

21 July 2015
Runchun Wang
Chetan Singh Thakur
T. Hamilton
J. Tapson
Andre van Schaik
ArXiv (abs)PDFHTML

Papers citing "A neuromorphic hardware architecture using the Neural Engineering Framework for pattern recognition"

3 / 3 papers shown
Title
FPGA Implementation of the CAR Model of the Cochlea
FPGA Implementation of the CAR Model of the Cochlea
Chetan Singh Thakur
T. Hamilton
J. Tapson
R. Lyon
André van Schaik
37
33
0
02 Mar 2015
Synthesis of neural networks for spatio-temporal spike pattern
  recognition and processing
Synthesis of neural networks for spatio-temporal spike pattern recognition and processing
J. Tapson
Greg K. Cohen
Saeed Afshar
K. M. Stiefel
Y. Buskila
Runchun Wang
T. Hamilton
André van Schaik
76
78
0
26 Apr 2013
Learning the Pseudoinverse Solution to Network Weights
Learning the Pseudoinverse Solution to Network Weights
J. Tapson
Andre van Schaik
60
103
0
13 Jul 2012
1