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HiAER-Spike: Hardware-Software Co-Design for Large-Scale Reconfigurable Event-Driven Neuromorphic Computing

20 March 2025
Gwenevere Frank
Gopabandhu Hota
Keli Wang
Abhinav Uppal
Omowuyi Olajide
Kenneth Yoshimoto
Leif Gibb
Qingbo Wang
Johannes Leugering
S. Deiss
Gert Cauwenberghs
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Abstract

In this work, we present HiAER-Spike, a modular, reconfigurable, event-driven neuromorphic computing platform designed to execute large spiking neural networks with up to 160 million neurons and 40 billion synapses - roughly twice the neurons of a mouse brain at faster-than real-time. This system, which is currently under construction at the UC San Diego Supercomputing Center, comprises a co-designed hard- and software stack that is optimized for run-time massively parallel processing and hierarchical address-event routing (HiAER) of spikes while promoting memory-efficient network storage and execution. Our architecture efficiently handles both sparse connectivity and sparse activity for robust and low-latency event-driven inference for both edge and cloud computing. A Python programming interface to HiAER-Spike, agnostic to hardware-level detail, shields the user from complexity in the configuration and execution of general spiking neural networks with virtually no constraints in topology. The system is made easily available over a web portal for use by the wider community. In the following we provide an overview of the hard- and software stack, explain the underlying design principles, demonstrate some of the system's capabilities and solicit feedback from the broader neuromorphic community.

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@article{frank2025_2504.03671,
  title={ HiAER-Spike: Hardware-Software Co-Design for Large-Scale Reconfigurable Event-Driven Neuromorphic Computing },
  author={ Gwenevere Frank and Gopabandhu Hota and Keli Wang and Abhinav Uppal and Omowuyi Olajide and Kenneth Yoshimoto and Leif Gibb and Qingbo Wang and Johannes Leugering and Stephen Deiss and Gert Cauwenberghs },
  journal={arXiv preprint arXiv:2504.03671},
  year={ 2025 }
}
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