DeepGate: Learning Neural Representations of Logic Gates

Applying Deep Learning (DL) in Electronic Design Automation (EDA) has become a trending topic in recent years. Many solutions are proposed that directly apply well-researched DL techniques to solve specific EDA problems. While demonstrating promising results, such design methodology is rather ad-hoc and requires careful model tuning for every problem. "How to learn a good circuit representation?" is still an open question. In this work, we propose DeepGate, a neural representation learner for logic gates. It learns an effective circuit representation by modeling circuits as directed acyclic graphs (DAGs) and exploiting strong inductive biases present in the circuit, e.g., reconvergence fanouts. Besides this, DeepGate uses logic simulated probabilities as rich supervision for every node. The experimental results show that DeepGate learns a reasonable representation from probability prediction with good generalization and can be applied to downstream tasks like test point insertion.