Exploring performance and power properties of modern multicore chips via simple machine models

Abstract
Modern multicore chips show complex behavior with respect to performance and power. Starting with the Intel Sandy Bridge processor, it has become possible to directly measure the power dissipation of a CPU chip and correlate this data with the performance properties of the running code. We establish machine models that describe the interaction of parallel code with the hardware, going beyond a simple bottleneck analysis. Together with a phenomenological power model we are able to explain many peculiarities in the performance and power behavior of multicore processors, and derive guidelines for power-efficient execution of parallel programs.
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